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Events: An Integrated Approach for Soft Error Tolerance of Combinational Circuits.

Title

An Integrated Approach for Soft Error Tolerance of Combinational Circuits.

Description

You are cordially invited by the COE/ICS Dept., to attend a PhD dissertation proposal, on the above given title, by Mr. Ahmad Tariq Sheikh, College of Computer Science and Engineering (CCSE),  PhD Programon Sunday, May 19th, 2013, at 11:15 A.M., in Building 22, Room 130.​

Abstract: With technology fabrications reaching 22nm and even smaller, systems are becoming more prone to the higher manufacturing defects with higher susceptibility to soft errors due to the exponential decrease in device feature size. Soft errors, which are caused by radioactive decay and cosmic rays, can flip the output of a gate, resulting in a soft error if it is propagated to the output of a circuit. This work is focused to analyze, model and design combinational circuits for soft error tolerance with minimum area overhead. We propose an integrated framework that primarily consists of three techniques to combat the Soft-Error Rate (SER) in combinational circuits. Extensive simulation studies will be performed to compare the reliability of proposed methods with the ones reported in recent literature.

Dr. ​Aiman H. El-Maleh, Professor, ICS Department, is his thesis advisor.​

EventDate

5/19/2013 11:15 AM

EndDate

5/19/2013 12:45 PM

DisplayItem

02

Attachments

Created at 5/19/2013 11:15 AM by Syed Saleemuddin
Last modified at 5/20/2013 9:19 AM by Syed Saleemuddin