​You are cordially invited by the COE dept., to attend a MS thesis defence, on the above given title, by Mr. Amran AbdulRahman Al-Aghbari, COE Full Time MS Student., on Tuesday, 11th December, 2012, at  10:00 AM, in Building 14, Room 108.​

Abstract: Conventionally, IC testing and speed characterization is carried out using very expensive Automatic Test Equipment (ATEs). Other low-cost testing and speed characterization methods are needed especially for developers of circuit IPs in small companies and universities. In this thesis, a special purpose test and characterization processor (TACP) for IC testing and speed characterization has been developed, implemented and tested. The processor utilizes specially developed test support circuitry (TSC) which is fabricated on the chip containing the IPs under test. The TSC, in coordination with the off-chip stand-alone TACP processor, receives test data serially, re-format them, apply them to IPs under test, re-format the test results and send it serially to the test processor. The TSC also include a configurable clock generator which is controlled by the TACP. By controlling the testing frequency and applying test patterns, the IPs can be characterized to find their maximum frequency of operation. A proof-of-concept implementation was realized using two FPGA boards; one for the processor and the other to emulate the chip that contains IPs and on-chip circuitry. Also, a complete user interface tool has been developed allowing the user to enter his test program, data and receive the test result data through a standard PC.

Dr. Muhammad Elrabaa, Associate Professor, COE Dept., is his thesis advisor.​