COE 203
Digital Logic Laboratory

Catalog Description

Review of Digital Logic Design: Design of Combinational Circuits, and Design of Sequential Circuits. Logic implementation using discrete logic components (TTL, CMOS), and programmable logic devices. Introduction to Field Programmable Logic Arrays (FPGAs). The basic design flow: design capture (schematic capture, HDL design entry, design verification and test, implementation (including some of its practical aspects), and debugging. Design of data path and control unit.

Prerequisite(s)

COE 202 (Digital Logic Design)

Textbook(s) and/or other Required Material

Introduction to Logic Design, Alan Marcovitz, 2ndEddition, McGraw-Hill, 2005 and Lab Manual prepared by Computer Engineering Department faculty.

Course Objectives

  • Design combinational and sequential circuits using discrete components and FPGAs to
    meet certain specifications.
  • Design and conduct experiments related to digital systems and to analyze their
    outcomes.
  • Work in a team.

Topics Covered

  • Lab Introduction, bread boards, FPGA boards, policies, overview of experiments,
    reporting, team-work, attendance, grading, etc.
  • (Experiment 1) Introduction to Digital Design
  • (Experiment 2) Prototyping of Logic Circuits using Discrete Components
  • (Experiment 3) Introduction to FPGA
  • (Experiment 4) Creating and Using Symbols
  • (Experiment 5) Introduction to Sequential Circuits
  • (Experiment 6) Clock and Clock Frequency
  • (Experiment 7) Building a Timer Circuit
  • (Experiment 8) Reaction Timer Part 1 –Generating Random Delay
  • (Experiment 9) Reaction Timer Part 2–Response Time
  • (Experiment 10) Reaction Timer Part 3–The Control Unit and Integration
  • (Experiment 11) Reaction Timer Part 4–Challenging The Player

Prepared by: Mr. Masud-ul-Hasan, February 24, 2014.