CSE 671: Silicon Compilation And High-Level Synthesis

CSE 671: Silicon Compilation And High-Level Synthesis

 
Course Information
Designation: 
 Required Course
Course Level: 
 Graduate
Prerequisites
Prerequisite(s) by Topic: 

COE 542 or Consent of the Instructor

Catalog Description: 

Levels of abstraction: behavioral, structural, and physical levels. Design de-
scription. Module generation (functional cell generation, gate matrix layout,
PLAs, etc.) and Module optimization. High level synthesis: Intermediate forms
(data flow and control flow graphs), Scheduling algorithms, data flow and con-

trol flow synthesis, resource allocation, and module binding. Knowledge based
and expert system approach to Design Automation.​