1. Combinational logic: Boolean algebra, Canonical forms, Karnaugh maps, logic minimization, Decoders, encoders, multiplexers, comparators, PLA’s.

2. Sequential logic: Latches & flip-flops, setup and hold times and timing diagrams, design procedure, state diagrams, 

state tables and state minimization. Mealy vs. Moore models of FSMs. Registers, counters, RAMs, ROMs, PLDs, and FPGAs. RTL level design, pseudo HDL description, data and control path design 

3. VLSI Design: Design of basic CMOS logic (Static, dynamic and PTL). ASIC design methodologies (custom vs. semi-custom). ASIC design flow (Design entry, logic synthesis, technology mapping, placement, and routing).

4. Computer arithmetic: High speed and Carry-Save adders. Design of sequential multipliers: Booth and modified Booth algorithms. Array and tree multipliers: Wallace tree, Dadda and Baugh Wooley. Floating point representation.

5. Hardware synthesis & Design Automation: Combinatorial optimization (shortest & longest path problems, 

graph coloring, clique covering and partitioning, Linear programming and max-min flow. Binary decision diagrams (BDDs). Hardware modeling (HDLs and dataflow). Architecture synthesis (Data path synthesis, and control synthesis). Scheduling and binding algorithms.

 

1. Morris Mano and Charles Kime, Logic and Computer Design Fundamentals, Second Edition, Prentice Hall International, 2000.

2. Israel Koren, Computer Arithmetic algorithms, second edition, A. K. Peters Ltd. 2002

3. N. Weste and K. Eshraghian, Principles of CMOS VLSI Design, Addison Wesley, 1993.

4. Giovani De Michelli, Synthesis and Optimization of Digital Circuits, McGraw-Hill, 1994.

5. Christos H. Papadimitriou and Keith Steiglitz, Combinatorial Optimization – Algorithms & Complexity, Prentice Hall

COE 360, COE 561, COE 586